How are instructions sent between memory and the processor



Basic Operational Concepts of a Computer

Most computer operations are executed in the ALU (arithmetic and logic unit) of a processor.

Example: to add two numbers that are both located in memory.

Each number is brought into the processor, and the actual addition is carried out by the ALU.

The sum then may be stored in memory or retained in the processor for immediate use.

When operands are brought into the processor, they are stored in high-speed storage elements (registers).

A register can store one piece of data (8-bit registers, 16-bit registers, 32-bit registers, 64-bit registers, etc)

Access times to registers are faster than access times to the fastest cache unit in the memory hierarchy.


Instructions for a processor are defined in the ISA (Instruction Set Architecture) Level 2

Typical instructions include:

Mov BX, LocA

Fetch the instruction

Fetch the contents of memory location LocA

Store the contents in general purpose register BX


Fetch the instruction

Add the contents of registers BX and AX

Place the sum in register AX

The program counter (PC) or instruction pointer (IP) contains the memory address of the next instruction to be fetched and executed.

Send the address of the memory location to be accessed to the memory unit and issue the appropriate control signals (memory read).

The instruction register (IR) holds the instruction that is currently being executed.

Timing is crucial and is handled by the control unit within the processor.



Bus structure and multiple bus structures are types of bus or computing. A bus is basically a subsystem which transfers data between the components of a Computer components either within a computer or between two computers. It connects peripheral devices at the same time.

- A multiple Bus Structure has multiple inter connected service integration buses and for each bus the other buses are its foreign buses. A Single bus structure is very simple and consists of a single server.

- A bus can not span multiple cells. And each cell can have more than one buses. - Published messages are printed on it. There is no messaging engine on Single bus structure

a) In single bus structure all units are connected in the same bus than connecting different buses as multiple bus structure.

b) multiple bus structure's performance is better than single bus structure. c) single bus structure's cost is cheap than multiple bus structure.

simplicity favors regularity

smaller is faster

good design demands compromise

make the common case fast

Instruction Set Architecture (ISA)

The Instruction Set Architecture (ISA) is the part of the processor that is visible to the programmer or compiler writer. The ISA serves as the boundary between software and hardware. We will briefly describe the instruction sets found in many of the microprocessors used today. The ISA of a processor can be described using 5 catagories:


  1. ALU Architecture for Processing
  2. Architecture
  3. Concepts and Principles
  4. Edit]In architecture
  5. Four principles of IS architecture
  6. Program Counter Architecture
  7. The Instruction Set Architecture

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