Note that in a load instruction, the ALU performs the address calculation.
- in a Store Instruction
Fig.3.8 Data Bus Connection a Store Instruction
In store instructions, the ALU also calculates the memory address.
A branch instruction will have one of two results: (1) the branch is not taken, in which case the next instruction is executed (i.e., instruction at address [PC]+4), or (2) the branch is taken, in which case the program counter gets an entirely new address (new address = [PC] + 16-bit immediate from instruction [± 32,768]).
In the first case, we simply use the PC update scheme shown on fig.3.2. In the second case, the current PC contents (next instruction address, that is, [PC]+4), is added to the 16-bit immediate contents of the instruction to form the new address.
Not only do we need an add function, but also a left shift 2 places (since memory is addressed as bytes, but the 16-bit immediate in the branch instruction is a word address).
This scheme is shown on the fig.3.9.
Fig.3.9. Conditional Branch Circuit
If branch is taken, 16-immediate in the branch instruction is (1) sign-extended to 32 bits, (2) shifted left 2 places, and (3) added to current PC contents.