Mapping From Instruction Code To Microoperation Address

Mapping of Instruction

Branch Logic

Conditional Branching

Status bits

provide parameter information such as the carry-out from the adder, sign of a number, mode bits of an instruction, etc.

control the conditional branch decisions made by the branch logic together with the field in the microinstruction that specifies a branch address.

Branch Logic - may be implemented in one of several ways:

The simplest way is to test the specified condition and branch if the condition is true; else increment the address register.

This is implemented using a multiplexer:

If the status bit is one of eight status bits, it is indicated by a 3-bit select number.

If the select status bit is 1, the output is 0; else it is 0.

A 1 generates the control signal for the branch; a 0 generates the signal to increment the CAR.

Unconditional branching occurs by fixing the status bit as always being 1.


Branching to the first word of a microprogram is a special type of branch. The branch is indicated by the opcode of the instruction.

The mapping scheme shown in the figure allows for four microinstruction as well as overflow space from 1000000 to 1111111.



  1. Addressing Modes
  2. Arithmetic Instructions
  3. Branch Instructions
  4. Computer Instructions
  5. Conditional Branch Instructions
  6. Data Transfer Instructions
  7. Formats of instructions
  8. Instruction Length
  9. Instructions of data handling
  10. Selection Of Address For Control Memory
  11. Symbolic Microinstructions

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Selection Of Address For Control Memory | Computer Instructions

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